CV - Björn Berglöf

 


 

 

Tallsätravägen 8
144 63 Rönninge
SWEDEN

+ 46-73-6000 584 (mobile)
bjorn.berglof@mrbear.se
www.mrbear.se

 


 

Summary

 

  

26 years as electronics designer: Asic / Fpga / Sw / Embedded

 

  

Ten year as self-employed consultant.

 

  

Wide range of applications: telecom, fighter aircraft, mobile phones, video
                                              servers, co-processors, 100Gbps switching...

 

  

Roles: design, prototyping, system, methodology, trouble shooter, teaching.

 

  

Patents and many patent-worthy designs.

 


 

Areas of knowledge

 

 

ASIC, FPGA design

Telecom 

 

 

Microprocessors

Embedded systems

 

 

Prototyping

Video processing

 

 

Analog electronics

Teaching

 


 

Experience

 

 

 

 

2011 - 
present

Senior Asic/Fpga/Sw designer at Marvell.
Several block designs in TSMC 28nm asics for 200 Gbps ethernet, including arithmetics, caches and ring-bus structures at very high rates. Prototyping using top-end Xilinx FPGAs, enabling hardware and software co-verification before the asic is manufactured. Defining boot sequences, embedded cores and pushing sw/hw-performance.

 

 

 

 

2006 -
2010

Senior Fpga Designer at Edgeware
Designing a 20 Gbps Video-on-demand server. Several Altera FPGA designs including AES and MD5 crypto, BCH error-correcting-coding, packet classification, multi-channel DMA, metering/shaping of traffic as well as various high-speed interfaces and BIST's. Designing drivers, apps and debug routines in C/Linux.

 

 

 

 

2002 -
2006

Senior Asic Designer at Xelerated
Designing  40 Gbps network processor (100Mgate+) Responsible for generic DDR-SRAM/FCRAM/RLDRAM/NSE programmable interfaces, handling i/o at 530Mbps/pin. Also designed co-processor in Xilinx FPGA handling high performance shaping and metering.

 

 

 

 

1993 -
2002

Own company Mr Bear AB (independent consultant).

Contract with Ericsson Telecom in Älvsjö, Stockholm 2001-2002.
Designing a voice processing ASIC for the AXD301 high performance ATM switch. Designing high performance arithmetic blocks. Used Celaro hardware acclerator for verification.

 

 

 

 

Contract with Saab Avionics, in Kista, Stockholm 1997-2001.
Designing a graphics processor ASIC for the Gripen fighter jet. Tool support and contacts with vendor. Several Altera CPLD/FPGA designs for video processing as well as C++ code in embedded VxWorks environment. Researching the use of commercial graphics processors in mil spec environments. Supervising several projects  as senior designer as well as giving giving courses and lectures.

 

 

 

Contract with Ericsson Communication Systems, Lund 1996-1997.
Asics for GSM and AMPS mobile phones. Low voltage and low power design, using VLSI 0.5u and 0.35u asic technology (400+ kgates). Responsible for deep-submicron design flow, and  handled libraries and contacts with vendor. Synopsys tool support. Using VHDL and several Mentor Graphics tools. 

 

 

 

Contract with Ericsson Telecom, Stockholm 1993-1995.
Designing SDH telecom equipment using Motorola 0.5u asic technology (300+ kgates), in Verilog and Synopsys environment. Several designs including: JTAG logic, CPU i/f, High Speed block. Responsible for generating functional test vectors and ATPG vectors.

Some shorter engagements with ContextVision in Linköping (design house and vendor selection, contract review) and C technologies in Lund (advising design flow, course in various front-/back-end issues).

 

 

 

 

1991 -
1993

Consulting Asic designer at ÅF-Industriteknik, Stockholm.
Design of four Texas Instruments ASICs in 0.7u BiCMOS process handling up to 184 Mbit/s data rate for Ericsson SDH equipment.  Responsible for bus interface to Motorola 68302, 68360. Wrote syntax checking tool in C. Using Motive static timing analyzer.

 

 

 

1988 -
1991

Consulting engineer at ÅF-Industriteknik, Stockholm.
Designing modems for laptop computers. The work included a lot of traveling, trouble-shooting and contacts with the telecom authorities in several countries. Analog/digital design and real-time assembly programming INTEL 8096. Several designs intended for outdoor environment including power supplies, battery operated equipment and battery chargers.

 

 

 

 

1986 -
1988

Lecturer at University of Zambia (Africa)
Giving course: 'Communication Theory and Systems' for final year telecom. students. Supervising BA students electronics projects.

 

1981 -
1986
 

Master of Science student.
Royal institute of Technology, Stockholm, Sweden.
Master's project 'Fiber-Optic Power supply' lead a patent application. During studies, part time teacher in various undergraduate courses.
 

 


 

Education

 

 

Master of Science in Electrical Engineering  
Royal Institute of Technology, Stockholm 1986.

 

  

Technician degree 1978.


 

Personal

 

 

Outgoing, creative and responsible.
Fluent in English, some German.
Thirty years as scuba diver, one star Instructor level.
Married.
Born Dec 16, 1958.
Enjoying excellent health.
References available at request.

 


 

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